This invention relates, in general, to arbitration systems and methods for an asynchronous bus computer system, and more particularly, to an arbitration system and method wherein the address decode and arbitration functions occur simultaneously thereby providing for a faster arbitration decision and therefore shorter overall arbitration cycle time.
There are currently available arbitration systems and methods for asynchronous bus computer systems. However, in each of these systems the address decode portion of an arbitration cycle is completed prior to beginning the actual arbitration decision which results in granting of a given resource to the selected requester. This results in a longer total time required to reach a given arbitration decision. While this additional time cost for each arbitration decision was relatively negligible with some older computer systems running at relatively low clock speeds, it has become a more significant factor at the higher clock speeds of more recent computer systems.